1. Field of the Invention
The present invention relates to a flip-chip mounting substrate and a flip-chip mounting method. More specifically, the present invention is directed to a flip-chip mounting substrate and a flip-chip mounting method in which a semiconductor element is flip-chip mounted by using an Au (gold) bump.
2. Description of the Related Art
Recently, mounting structures have been widely utilized in which an electronic element (for example, semiconductor element) is flip-chip bonded to connecting pads formed on a flip-chip mounting substrate by using a bonding material while employing Au bumps on the electronic element as external connecting terminals (for instance, refer to JP-A-2001-332584).
FIG. 1 shows one example of a semiconductor chip 1 which is to be flip-chip mounted. FIG. 2 shows one example of a flip-chip mounting substrate 5 on which the semiconductor chip 1 is to be flip-chip mounted. FIG. 1 shows a circuit formed surface 1a of the semiconductor chip 1, and the semiconductor chip 1 is flip-chip mounted in a face-down manner so that the circuit formed surface 1a faces the flip-chip mounting substrate 5.
Outer peripheral Au bumps 2 and central Au bumps 3 which are gold bumps are formed on the circuit formed surface 1a of the semiconductor chip 1. The outer peripheral Au bumps 2 are arranged on the circuit formed surface 1a in a peripheral shape. Also, the central Au bumps 3 are formed at a central position of the circuit formed surface 1a. In the related art, in a semiconductor element in which Au bumps are employed as external connecting terminals, a general structure is to arrange the Au bumps in a peripheral shape. However, a total number of terminals is increased as a density of recent semiconductor elements becoming higher. As a consequence, the central Au bumps 3 are arranged also at the central position of the circuit formed surface 1a. 
In connection to the above-explained structures, the flip-chip mounting substrate 5 on which the semiconductor chip 1 is flip-chip mounted also has a structure in which outer peripheral pads 7 corresponding to the outer peripheral Au bumps 2 and central pads 8 corresponding to the central Au bumps 3 are provided. Also, a solder resist 10 (indicated by satin finished surface) is provided on an upper surface side of the semiconductor chip 1 on the flip-chip mounting substrate 5, and openings are formed in the solder resist 10 at positions in which the respective pads 7 and 8 are formed so that these pads 7 and 8 are exposed.
In the related art, as to the outer peripheral pads 7 to which the outer peripheral Au bumps 2 arranged in the peripheral shape are flip-chip mounted, a frame-shaped opening portion 11 having a frame shape is formed in the solder resist 10. As a consequence, all of the outer peripheral pads 7 are positioned within this frame-shaped opening portion 11. On the other hand, as to the central pads 8 positioned at the center, central opening portions 12 are formed in the solder resist 10 with respect to each of these central pads 8.
After bonding materials (for example, solder) are provided on the respective pads 7 and 8, the semiconductor chip 1 of the above-described structure is flip-chip mounted on the flip-chip mounting substrate 5. Then, after the flip-chip mounting, an underfill resin is provided in a separated portion between the semiconductor chip 1 and the flip-chip mounting substrate 5. This underfill resin is provided in order to prevent stresses caused by a thermal expansion difference between the semiconductor chip 1 and the flip-chip mounting substrate 5 from being applied between the respective Au bumps 2, 3 and the respective pads 7, 8. Since this underfill resin is provided, mounting reliability between the semiconductor chip 1 and the flip-chip mounting substrate 5 can be increased.
FIG. 3 is a sectional view showing a state after the semiconductor chip 1 is mounted on the flip-chip mounting substrate 5 and before the underfill resin is provided. More specifically, FIG. 3 shows a portion in an enlarged manner, which is in vicinity of a portion where the outer peripheral Au bump 2 is flip-chip mounted to the outer peripheral pad 7. As shown in this drawing, the outer peripheral Au bump 2 is flip-chip mounted via solder 14 to the outer peripheral pad 7, and the outer peripheral pad 7 is positioned within the frame-shaped opening portion 11 formed in the solder resist 10.
In order to provide an underfill resin 15 at a flip-chip mounting position between the outer peripheral Au bump 2 and the outer peripheral pad 7, as shown by an arrow of a broken line in FIG. 3, the underfill resin 15 is filled from a gap between an outer peripheral edge 1b of the semiconductor chip 1 and the flip-chip mounting substrate 5 into a bonding position (namely, within the frame-shaped opening portion 11) of the outer peripheral Au bump 2 and the outer peripheral bump 7.
The bonding position of the outer peripheral Au bump 2 and the outer peripheral pad 7 is located near the outer peripheral edge 1b of the semiconductor chip 1. As a consequence, a process of filling the underfill resin 15 into the bonding position (namely, within the frame-shaped opening portion 11) of the outer peripheral Au bump 2 and the outer peripheral pad 7 could be smoothly and easily carried out. Also, the underfill resin 15 entered into the frame-shaped opening portion 11 moves along the frame-shaped opening portion 11, so that the bonding position of the outer peripheral Au bump 2 and the outer peripheral pad 7, which is within the frame-shaped opening portion 11, could be firmly sealed by the underfill resin 15.
However, currently the following problems occur. That is, since the central Au bumps 3 are provided at the central position of the circuit formed surface 1a of the semiconductor chip 1, and the central Au bumps 3 are bonded to the central pads 8, voids 16 (refer to FIG. 7) are frequently generated at the position where the underfill resin 15 is provided. Referring now to FIGS. 4A to 7B, a description is made of a reason why the voids 16 are generated near the flip-chip bonding positions of the central Au bumps 3 and the central pads 8 in the related art.
FIGS. 4A and 4B show the flip-chip mounting substrate 5 before the semiconductor chip 1 is mounted, and more specifically, shows a portion in vicinity of the central pads 8 in an enlarged manner. FIG. 4A is a sectional view taken along an arrow line A-A of FIG. 4B.
As explained above, central opening portions 12 are provided for each of the central pads 8. Also, the central pad 8 is of a shape having a wide width portion 8a and a narrow width portion 8b. In the related art, the central opening portion 12 is formed larger with respect to the central pad 8, and a separated portion 6a (namely, a portion indicated by an arrow W2 in FIG. 4A) is formed between the central pad 8 and the edge portion of the central opening portion 12. In this separated portion 6a, a surface of a substrate main body 6 (flip-chip mounting substrate 5) is exposed. As a consequence, a depth of the central opening portion 12 becomes a distance measured from an upper face of a solder resist 10 to an upper face of the substrate main body 6 (namely, a thickness of the solder resist 10, which is represented by an arrow H2 in FIG. 4A).
FIGS. 5A and 5B show a state in which a solder 14 as a bonding material is provided on the upper face of the central pad 8. This solder 14 is provided only on the upper portion of the central pad 8, so that the separated portion 6a is still present within the central opening portion 12.
Also, FIGS. 6A and 6B show a state in which the central Au bump 3 is flip-chip bonded via the solder 14 to the central pad 8, and the semiconductor chip 1 is flip-chip mounted on the flip-chip mounting substrate 5. Even in this flip-chip mounting state, the separated portion 6a is present within the central opening portion 12.
Also, FIGS. 7A and 7B show a state in which the underfill resin 15 is provided between the flip-chip mounted semiconductor chip 1 and the flip-chip mounting substrate 5.
As previously explained with reference to FIG. 3, the process of sealing the bonding position of the outer peripheral Au bump 2 and the outer peripheral pad 7 by the underfill resin 15 could be easily and firmly carried out. This is because since the outer peripheral Au bumps 2 are arranged at the outer peripheral position of the semiconductor chip 1, the underfill resin 15 could be filled into the separated portion between the semiconductor chip 1 and the flip-chip mounting substrate 5 from the outer peripheral edge 1b. 
In contract thereto, the bonding position of the central Au hump 3 formed at the central position of the semiconductor chip 1 and the central pad 8 is sealed by such a way that the underfill resin 15 filled from the outer peripheral edge 1b of the semiconductor chip 1 flows up to the bonding position of the central Au bump 3 and the central pad 8.
However, when the underfill resin 15 flows up to the bonding position (namely, a position where the central opening portion 12 is formed in the solder resist 10) of the central Au bump 3 and the central pad 8, as shown by an arrow shown in FIG. 7B, such a phenomenon has occurred that the underfill resin 15 flows to the peripheral portion of the central opening portion 12 ahead of the internal portion of this central opening portion 12, without flowing into the internal portion of the central opening portion 12.
As explained above, when the underfill resin 15 does not flow into the internal portion of the central opening portion 12, then the central Au bump 3 and the central pad 8 are not held by the underfill resin 15. Thus, the stress caused by the thermal expansion difference between the semiconductor chip 1 and the flip-chip mounting substrate 5 is directly applied to the bonding position. As a result, the mounting reliability is lowered.
Also, the void (air gap) 16 is formed around the bonding position of the central Au bump 3 and the central pad 8. When a heat application process operation or the like is subsequently performed, the void 16 is thermally expanded. Accordingly, there are such problems that the bonding of the central Au bump 3 and the central pad 8 is damaged, and cracks are made in the solder resist 10, the underfill resin 15 and the like.